| パートいいえ | メーカー | アプリケーション |
|---|
| ISPLSI3256E-70LB320 | Lattice | In-system programmable high density PLD, 256 I/O pins, 12000 PLD gates, 512 registers, 70MHz |
| ISPGDX160A-7B272 | Lattice | In-system programmable generic digital crosspoint |
| M4-32/32-18VI | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 32 macrocells, 32 I/Os, 18ns |
| M5LV-128/68-7YC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| ISPLSI2192VE-100LB144 | Lattice | 100 MHz 3.3V in-system prommable superFAST high density PLD |
| M4LV-128/64-14YI | Lattice | High-performance E2CMOS in-system programmable logic, 3.3V Vcc, 128 macrocells, 64 I/Os, 14ns |
| ISPLS1032EA-100LT100 | Lattice | 100 MHz in-system prommable high density PLD |
| M4A3-64/32-12VI48 | Lattice | 12ns, 3.3V high performance E2 CMOS in-system programmable logic |
| M4A3-32/32-10VI | Lattice | 10ns, 3.3V high performance E2 CMOS in-system programmable logic |
| MACH111SP-14JI | Lattice | High-performance EE CMOS programmable logic,32 macrocells, 32 I/Os, in-system programmable, 14ns |
| M4-256/128-15AC | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 256 macrocells, 128 I/Os, 15ns |
| M5LV-512/160-10YC | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-320/120-12YI | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH221SP-14YI | Lattice | High-performance EE CMOS programmable logic, 96 macrocells, 48 I/Os, in-system programmable, 14ns |
| M5LV-384/160-7YC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-384/120-20HI | Lattice | 20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| PALCE20V8Q-25PI/4 | Lattice | EE CMOS universal programmable array logic, 25ns |
| M5-128/120-12YI | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-512/120-12YC | Lattice | 12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH221SP-10YC | Lattice | High-performance EE CMOS programmable logic, 96 macrocells, 48 I/Os, in-system programmable, 10ns |
| M4-64/32-10VI | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 64 macrocells, 32 I/Os, 10ns |
| MACH131SP-10YC | Lattice | High-performance EE CMOS programmable logic, 64 macrocells, 64 I/Os, in-system programmable, 10ns |
| M5-128/68-10YI | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-320/192-15AC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| MACH220-10JC | Lattice | High-density EE CMOS programmable logic, 96 macrocells, 48 outputs, 56 inputs with pull-up resistors, 96 flip-flops; 4 clock choices, 10ns |
| MACH221-10JC | Lattice | High-performance EE CMOS programmable logic, 96 macrocells, 48 I/Os, 10ns |
| ISPGDS22-7J | Lattice | In-system programmable 3.3V generic digital switch |
| M5LV-128/104-12VI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-128/68-7VI | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| PLSI1032-60LJI | Lattice | High-density programmable logic, 20ns |
